SELECTED WORK / PCB LAYOUT
Xilinx XC7Z100 SOM + Carrier Board
PCB layout for a Xilinx XC7Z100-based SOM and carrier-board project. The 14-layer SOM combines a 102 × 72 mm outline with through-hole vias, memory routing and configurable FPGA interfaces.
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- Platform
- Xilinx XC7Z1002FFG900I
- SOM layer count
- 14 layers
- SOM dimensions
- 102 × 72 mm
- Design tool
- Cadence Allegro 16.6
- SOM via technology
- Through-hole vias
- Project interfaces
- LPDDR3 · PCIe Gen 2 · USB 3.2 · Custom FPGA interfaces
PCB layout scope
SOM core-board and carrier-board PCB layout. Layer count and dimensions above refer specifically to the SOM; carrier-board specifications are not listed.
Project imagery
Original layout views show both sides of the SOM, selected routing layers and power-distribution views. The assembly photograph has its background removed and customer identifiers redacted; chip markings and component references are retained.
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